
module Flatten_t (
    a[4:0],
    b,
    c
);

input [4:0]a;
input b;
output c;

wire d,e,f,g;

assign d = a[0] & b;
assign e = a[1] & d;
assign f = a[2] & e;
assign g = a[3] & f;
assign c = a[4] & g;

endmodule